In fabricating semiconductor integrated circuits, it has become conventional to first form one of a great variety of insulative, semiconductive, or conductive layers and then selectively remove portions of such layer to produce a desired pattern. As the art has progressed to the use of ever-smaller dimensions, various forms of plasma etching, such as, for example, reactive ion etching, sometimes termed "reactive sputter etching," have been increasingly used.
More specifically, in the field of silicon-based Very Large Scale Integrated Circuits ("VLSICs"), various similar forms of a Complementary Metal Oxide Semiconductor ("CMOS") technology are widely used. In CMOS integrated circuit devices, electrical contact to source, drain and gate regions of individual devices contained therewithin often is facilitated by first selectively removing, by reactive ion etching, those portions of layers overlying such regions to expose surface portions of such regions and then forming a metal silicide layer at the exposed surface of each such region. As is well known, a metal silicide typically is formed by depositing a metal film, such as titanium, in contact with a silicon surface and then heating the body to an elevated temperature to create a compound, e.g., titanium silicide, which advantageously is stable, physically adherent and effective in producing a low resistance connection to the desired region.
Problems are often encountered in reliably and reproducibly forming the many hundreds of thousands of silicide layers which typically are required on each CMOS VLSIC. Such problems are often manifested in obviously incomplete reaction of the metal with the silicon to form a silicide, blistering and peeling which are evident by visual inspection immediately after heating, and less obvious, but unacceptably poor adhesion, which may not be evident until reliability testing after device fabrication has been completed. Still another problem is that an excessively high electrical resistance will be found by later electrical analysis, even though the silicide layer appeared visually to be acceptable after the heating step.
Heretofore, when such problems were encountered, workers in the art have tended to attempt to verify that the cleaning step(s) preceding the metal deposition step and the metal deposition step itself had been performed correctly. Often no understanding was gained as to the cause for intermittent failure to form one or more acceptable silicide layers on an otherwise wholly acceptable device.